Maps for 6-in SVX3D wafers from lots 9 and 12

Click on letters in the "Maps" column to get various wafer maps in Postscript:
A -- standard wafer quality map
B -- map of die failure types
C -- pipeline quality map
D -- map of "random" bad pipeline cells

 Wafer # 
 Manufacturer # 
 Good die yield (%) 
 Good+fair yield (%) 
    Maps    
162
Y21316-12-17
38.1
57.5
A, B, C, D
163
Y21316-12-09
37.3
48.5
A, B, C, D
164
Y21316-12-20
43.3
56.7
A, B, C, D
165
Y21316-12-13
26.1
35.8
A, B, C, D
166
Y21316-12-08
37.3
52.2
A, B, C, D
167
Y21316-12-01
27.6
36.6
A, B, C, D
168
Y21316-12-06
48.5
64.2
A, B, C, D
169
Y21316-12-05
33.6
51.5
A, B, C, D
170
Y21316-12-18
28.4
35.8
A, B, C, D
171
Y21316-12-07
14.9
31.3
A, B, C, D
172
Y21316-12-03
48.5
62.7
A, B, C, D
173
Y21316-09-18
36.6
47.0
A, B, C, D
174
Y21316-09-20
58.2
73.1
A, B, C, D
175
Y21316-09-10
57.5
72.4
A, B, C, D
176
Y21316-09-19
38.1
64.2
A, B, C, D
177
Y21316-09-06
42.5
57.5
A, B, C, D
178
Y21316-09-12
36.6
47.8
A, B, C, D
179
Y21316-09-09
52.2
66.4
A, B, C, D
180
Y21316-09-17
54.5
72.4
A, B, C, D
181
Y21316-09-11
21.6
38.1
A, B, C, D
182
Y21316-09-13
61.9
78.4
A, B, C, D
183
Y21316-09-16
2.2
11.9
A, B, C, D
184
Y21316-09-14
44.8
56.7
A, B, C, D
185
Y21316-09-07
52.2
68.7
A, B, C, D
186
Y21316-09-15
47.8
55.2
A, B, C, D

The following wafers have been probed before backgrinding and backplating:

 Wafer # 
 Manufacturer # 
 Good die yield (%) 
 Good+fair yield (%) 
    Maps    
74*
Y21316-09-03
29.9
46.3
A, B, C, D
76
Y21316-12-04
44.8
55.2
A, B, C, D
80*
Y21316-12-15
17.9
30.6
A, B, C, D
82*
Y21316-12-11
41.0
47.8
A, B, C, D
92**
Y21316-09-02
41.0
56.0
A, B, C, D
93
Y21316-09-05
63.4
71.6
A, B, C, D
137
Y21316-12-12
44.0
59.7
A, B, C, D
147*
Y21316-12-14
39.6
49.3
A, B, C, D

* -- Yield and maps after annealing

** -- This wafer has been diced without backgrinding for studies of via failures

The average yield of good dice for wafers from lots 9 and 12 is 39.7 %. The combined yield of good and fair dice is 53.3 %.


Questions? E-mail to igv@lbl.gov