200402LBL002

Channel 0

Channel 1

Channel 2

Channel 3

Enable digital

OK

OK

OK

OK

Enable analog

OK

OK

OK

OK

VDD@IDD~0.0A(DAC=0)

2.77 V

2.73 V

2.73 V

VDD@IDD~0.0A(DAC=255)

1.27 V

1.26 V

1.27 V

VDD@IDD=1.0A(DAC=0)

2.37 V

2.34 V

2.33 V

VDD@IDD=1.0A(DAC=255)

0.88 V

0.88 V

0.88 V

IDD limit (with DAC=0)

(when VDD goes to 0)

 1.2 A

1.23 A

1.22 A

1.28 A

IDD module ~= supplied current?

 yes

YES

YES

YES

Set DAC dig works?

 yes

YES

YES

YES

Read back  DAC dig works?

 yes

VDDA@IDDA=0.0A(DAC=0)

2.73 V

2.76 V

2.72 V

2.72 V

VDDA@IDDA=0.0A(DAC=255)

1.26 V

1.26 V

1.26 V

1.26 V

VDDA@IDDA=1.4A (DAC=0)

2.14 V

2.16 V

2.14 V

2.15 V

VDDA@IDDA=1.4A(DAC=255)

0.67 V

0.69 V

0.69 V

0.70 V

IDDA limit (with DAC=0)

(when VDDA goes to 0)

1.49 A

1.53 A

1.54 A

1.54 A

IDDA module ~= supplied current?

YES

YES

YES

YES

Set DAC ana

OK

OK

OK

OK

Read back DAC ana

 ok     

 ok

 ok

 ok

Select Channel for Read

YES

YES

YES

YES

Thermal interloc

R7 = 15 k
T = 37 C

R7 = 15 k
T = 37 C

 R7 = 15 k
T = 37 C

 R7 = 15 k
T = 37 C

MCC test w/ DT0 (tests data lines)

OK

OK

OK

w/ DTO2

OK

OK

OK

Digital inject scan

 untested

OK

OK

OK

High Voltage routing

OK

OK

OK

OK

Perform a threshold scan with actual module (tests strobe + HV). Check noise.

 untested

OK

OK

OK