200402LBL003

	Channel 0	Channel 1	Channel 2	Channel 3
Enable digital	OK	OK	OK	OK
Enable analog	OK	OK	OK	OK
VDD@IDD~0.0A(DAC=0)	2.73 V	2.73 V	2.74 V	2.73 V
VDD@IDD~0.0A(DAC=255)	1.27 V	1.27 V	1.27 V	1.26 V
VDD@IDD=1.0A(DAC=0)	2.33 V	2.34 V	2.35 V	2.34 V
VDD@IDD=1.0A(DAC=255)	0.88 V	0.88 V	0.88 V	0.87 V
IDD limit (with DAC=0) (when VDD goes to 0)	1.23 A	1.17 A	1.24 A	1.27 A
IDD module ~= supplied current?	OK	OK	OK	OK
Set DAC dig works?	OK	OK	OK	OK
Read back DAC dig works?	OK	OK	OK	OK
VDDA@IDDA=0.0A(DAC=0)	2.73 V	2.74 V	2.74 V	2.74 V
VDDA@IDDA=0.0A(DAC=255)	1.27 V	1.27 V	1.27 V	1.27 V
VDDA@IDDA=1.4A (DAC=0)	2.07 V	2.10 V	2.09 V	2.08 V
VDDA@IDDA=1.4A(DAC=255)	0.61 V	0.62 V	0.62 V	0.60 V
IDDA limit (with DAC=0) (when VDDA goes to 0)	1.51 A	1.54 A	1.55 A	1.58 A
IDDA module ~= supplied current?	OK	OK	OK	OK
Set DAC ana	OK	OK	OK	OK
Read back DAC ana	OK	OK	OK	OK
Select Channel for Read	OK	OK	OK	OK
Thermal interlock	R7 = 15 k T = 37 C	R7 = 15 k T = 37 C	R7 = 15 k T = 37 C	R7 = 15 k T = 37 C
MCC test @80 Mb/s w/ DT0	OK	OK	OK	OK
w/ DTO2	OK	OK	OK	OK
Digital inject scan	untested	OK	OK	OK
High Voltage routing	untested	OK	OK	OK
Perform a threshold scan with actual module (tests strobe + HV). Check noise.	untested	OK	OK	OK